The majority of present day integrated circuits (ICs) are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. An MOS transistor includes a gate structure that overlies a channel separating spaced apart source and drain regions between which a current can flow. The typical IC includes a plurality of conductive layers that selectively interconnects the MOS transistors, routes power supply voltages, input/output signals, clock signals, and the like to implement the intended circuit function. The conductive layers are separated by dielectric layers (ILDs) that provide electrical isolation between unrelated conductive layers. A wide variety of insulating materials can be used as ILD layers, including oxides, nitrides, oxynitrides, high dielectric constant insulators, low dielectric constant insulators, and the like, as well as multiple layers of these materials sandwiched together, as the circuit needs dictate. The conductive layers are usually formed from metals or from doped polycrystalline silicon.
When operating properly, voltages associated with the gate structure, either from charges stored on the gate structure or from voltages applied to the gate structure, control the flow of current through the channel between the source and drain regions. Unfortunately, inadvertently stored charge can change the conductive state of some of the MOS transistors or can cause a parasitic MOS transistor to become conductive, and such can cause the IC to operate incorrectly. The inadvertently stored charge can be stored on one of the conductive layers, on one of the dielectric layers, or at an interface between two of the dielectric layers. One source of the inadvertent charge is ultraviolet (UV) radiation resulting from certain process steps used in the fabrication of the IC. The UV radiation can cause the creation of hole-electron pairs with the subsequent storage of either the hole or the electron. The UV radiation can result, for example, from plasma processing during either etch or deposition steps. Plasma etching and plasma enhanced chemical vapor deposition (PECVD) are common process tools used in IC fabrication.
The inadvertently storage of charge is especially problematic in nonvolatile memory devices such as electrically erasable programmable read only memories (EEPROM) and flash memories, and most especially in nonvolatile programmable memories of the conductor-oxide-nitride-oxide-semiconductor (SONOS or MONOS) type. In the proper operation of such memories charge is either stored or not stored on the nitride layer of the gate structure to indicate the storage of a one or a zero. In other nonvolatile programmable memories charge can be stored on a polycrystalline silicon layer that is sandwiched between two insulator layers. The generation of inadvertent charge by UV radiation that is trapped on the nitride or polycrystalline silicon layer may cause the storage of incorrect information. Similar problems can occur with other types of nonvolatile memories such as those employing polymer gate storage regions.
One method to avoid the generation of UV radiation induced charge generation is to deposit, by chemical vapor deposition (CVD), a UV radiation blocking insulator overlying the gate structure. Such a method is disclosed in U.S. Pat. No. 6,774,432. The UV radiation blocking layer prevents the radiation caused by any subsequent fabrication step from reaching the gate structure and hence prevents the generation of charges that can collect on the gate structure. Although the chemical vapor deposition of such a blocking layer is successful in preventing the generation and collection of charges on the gate structure, such blocking layers are difficult to etch, thus leading to long process times and undesirable etch profiles.
Accordingly, it is desirable to provide methods for fabricating semiconductor devices that overcome the problems associated with previous UV blocking techniques and that provide method steps for forming a UV radiation blocking layer that is easy to etch. In addition, it is desirable to provide methods, in accordance with one embodiment of the invention, for fabricating semiconductor devices that include a UV radiation blocking layer that is compatible with copper metallization. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.